Time and Realtime

In SystemVerilog, managing time and modeling real-time behavior is crucial, especially when simulating and verifying digital designs in the context of real-world timing. Two primary data types help achieve this: time and realtime.

Time

• The time data type is used to represent simulation time. It can capture values from the simulator's time unit down to its precision. This is often used for recording time intervals or expressing delays.

• Its size is implementation-dependent but is usually 64 bits in most of the modern simulators.

module time_example;
    time startTime;
    time endTime;
    time elapsedTime;
    time delay1=10;
    
    initial begin
        startTime = $time;
        #delay1;  // delay of 10 time units
        endTime = $time;
        elapsedTime = endTime - startTime;
        $display("Elapsed Time: %0d time units", elapsedTime);
    end
endmodule

Realtime

• The realtime data type represents time as a floating-point number. This is valuable when there's a need to represent fractional time values, especially useful in mixed-signal simulations where analog values evolve continuously.

• It's particularly relevant when interfacing with real-number models or when high precision is required.

module realtime_example;
    realtime analogTime;
    realtime delay2=10.5;
    
    initial begin
        analogTime = $realtime;
        #delay2;  // delay of 10.5 time units
        $display("Time after delay: %0f time units", $realtime - analogTime);
    end
endmodule

realtime is not the same as $realtime. realtime is a datatype for a variable where as $realtime is a System Function which will be discussed in the System Task and Function section.

It's worth noting that while time and realtime both represent time, their use cases differ based on the need for integer or floating-point representations.

In the context of mixed-signal verification, as touched upon earlier, the realtime datatype becomes particularly significant. Analog signals do not just change at discrete intervals; they evolve continuously. Hence, when capturing the behavior of such signals, the fractional time values are essential, and this is where realtime shines. It enables a high-fidelity representation of the analog world within the primarily digital context of SystemVerilog.